The present invention relates to a surge protection and reset circuit for a discharge lamp, and more particularly to a surge protection and reset circuit for resetting a microprocessor to maintain a discharge lamp under a normal operating condition when the microprocessor is crashed owing to the cross talk or radiation effect in igniting a high-pressure discharge lamp.
FIG. 1 shows a typical starting circuit for a discharge lamp within a projector. Please refer to FIG. 1. The discharge lamp 3 is electrically connected to a ballast 2. The ballast 2 is used for igniting a discharge lamp 3 within a projector. The discharge lamp 3 can be a halogen lamp or an ultra high-pressure lamp. When a user wants to operate a projector, the first step is to turn on a start-up switch 11. The start-up switch 11 is electrically connected to an input terminal 1c of a microprocessor 1. When the start-up switch 11 is turned on, an input signal is generated and sent into the microprocessor 1. The microprocessor 1 has one output terminal 1a which is electrically connected to an input terminal 121 of a buffer circuit 12. The buffer circuit 12 includes a transistor Qa and a plurality of resistors. The buffer circuit 12 is also an inverter. When an output signal from an output terminal 1a of the microprocessor 1 is a high level, an output signal from an output terminal 120 of the buffer circuit 12 is a low level.
The output terminal 120 of the buffer circuit 12 is electrically connected to an input terminal 2a of the ballast 2. When the ballast 2 receives an output signal from the output terminal 120 of the buffer circuit 12, the ballast 2 generates a high pressure voltage on output terminals 2c and 2d of the ballast 2 to ignite the discharge lamp 3. And then an output terminal 2b of the ballast 2 outputs a voltage signal to an input terminal 1b of the microprocessor 1. After the discharge lamp 3 is lighted, the terminals of 2c and 2d of the ballast 2 return to an ordinary voltage.
The instantaneous high-pressure surge current will generate the radiation and cross talk effect so that the microprocessor 1 accessing the data information form a RAM or ROM may be interrupted and the microprocessor 1 will cause a wrong result. Therefore, the microprocessor 1 will be shut down.
It is therefore attempted by the applicant to deal with the above situation encountered with the prior art.
It is therefore an object of the present invention to propose a surge protection and reset circuit for resetting a microprocessor to maintain a discharge lamp under a normal operating condition when the microprocessor is crashed owing to the cross talk or radiation effect in igniting a high-pressure discharge lamp. The surge protection and reset circuit for a discharge lamp includes a ballast, a starting control circuit, a microprocessor, and a reset circuit. The ballast is electrically connected to the discharge lamp for igniting the discharge lamp. The starting control circuit is electrically connected to the ballast for triggering the ballast to ignite the discharge lamp and powering the ballast. The microprocessor is electrically connected to the starting control circuit for initializing the starting control circuit when the microprocessor receives a lamp-state signal and a reset signal. The reset circuit has an output terminal electrically connected to the microprocessor for providing the reset signal to reset the microprocessor when the reset circuit receives the lamp-state signal from a lamp-state terminal of the ballast.
According to an aspect of the present invention, the surge protection and reset circuit further includes a first voltage regulator electrically connected to the microprocessor and the starting control circuit for providing a first voltage level to the starting control circuit when the microprocessor outputs a first control signal to the first voltage regulator.
Preferably, the microprocessor outputs the first control signal when the microprocessor receives the lamp-state signal.
Preferably, the microprocessor has a reset terminal electrically connected to the output terminal of the reset circuit.
Preferably, the reset circuit includes a first transistor, a second resistor, and at least one first capacitor. The first transistor has a base terminal electrically connected to one end of a first resistor, and the other end of the first resistor electrically connected to the lamp-state terminal. The second resistor has one end electrically connected to an collector terminal of the first transistor, and the other end of the second resistor being ground. At least one first capacitor is electrically connected to an emitter terminal of the first transistor and a voltage supply, and the other end of the at least one first capacitor is electrically connected to the reset terminal of the microprocessor.
Preferably, the starting control circuit includes a silicon control rectifier (SCR), a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor. The silicon control rectifier (SCR) has a first terminal electrically connected to the output terminal of the first voltage regulator. The third resistor has one end electrically connected to a second terminal of the silicon control rectifier, and the other end of the third resistor is electrically connected to a fourth resistor. The fifth resistor has one end electrically connected to an intersection of the third resistor and the fourth resistor and the other end of the fifth resistor electrically connected to a third terminal of the silicon control rectifier, wherein the intersection is the output terminal of the starting control circuit. The sixth resistor has one end electrically connected to the third terminal of the silicon control rectifier and the other end electrically connected to the microprocessor.
Preferably, the starting control circuit further includes a buffer and inverting circuit mounted between the microprocessor and the sixth resistor for increasing a fan-out current and providing a trigger signal to the third terminal of the silicon control rectifier.
Preferably, the buffer and inverting circuit includes a second transistor, a seventh resistor, an eighth resistor, and a ninth resistor. The seventh resistor has one end electrically connected to the output terminal of the microprocessor. The second transistor has a base terminal electrically connected to the other end of the seventh resistor and a collector terminal electrically connected to the sixth resistor. The ninth resistor has one end electrically connected to an emitter terminal of the second transistor and the other end electrically connected to a voltage supply. The eighth resistor has one end electrically connected to a collector terminal of the second transistor and the other end electrically connected to ground.
Preferably, the surge protection and reset circuit further includes a second voltage regulator having a control terminal electrically connected to the lamp-state terminal of the ballast and having an output terminal electrically connected to an application-specific integrated circuit (ASIC) for providing a second voltage level to the application-specific integrated circuit when the lamp-state terminal of the ballast outputs the lamp-state signal to the control terminal of the second voltage regulator.
Preferably, the surge protection and reset circuit further includes an OR gate logic circuit, a third voltage regulator, and a fan. The OR gate logic circuit has two input terminals electrically connected to the application-specific integrated circuit (ASIC) respectively and the output terminal of the starting control circuit. The third voltage regulator has a control terminal electrically connected to an output terminal of the OR gate logic circuit for providing a third voltage level when the third voltage regulator receives a signal from the OR gate logic circuit. The fan is electrically connected to an output terminal of the third voltage regulator for dissipating heat of the surge protection and reset circuit when the fan receives the third voltage level.
The present invention may best be understood through the following description with reference to the accompanying drawings, in which: